Jack O'Sullivan
b68e82ae03
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CI / Check, build and cache Nix flake (push) Successful in 42m12s
84 lines
2.8 KiB
Diff
84 lines
2.8 KiB
Diff
From 7de73e0bb036ab1c0aa69170eec99fdddca92634 Mon Sep 17 00:00:00 2001
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From: Hamza Mahfooz <hamza.mahfooz@amd.com>
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Date: Thu, 6 Apr 2023 12:31:06 -0400
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Subject: [PATCH] drm/amd/display: fix flickering caused by S/G mode
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Currently, we allow the framebuffer for a given plane to move between
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memory domains, however when that happens it causes the screen to
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flicker, it is even possible for the framebuffer to change memory
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domains on every plane update (causing a continuous flicker effect). So,
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to fix this, make it so that we always pin a plane's framebuffer to the
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same memory domain in dm_plane_helper_prepare_fb().
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Fixes: 81d0bcf99009 ("drm/amdgpu: make display pinning more flexible (v2)")
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Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
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---
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.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 31 ++++++++++++++-----
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1 file changed, 23 insertions(+), 8 deletions(-)
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diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
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index 322668973747..921b028d5b34 100644
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--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
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+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
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@@ -826,9 +826,8 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane,
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struct drm_plane_state *new_state)
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{
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struct amdgpu_framebuffer *afb;
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- struct drm_gem_object *obj;
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struct amdgpu_device *adev;
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- struct amdgpu_bo *rbo;
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+ struct amdgpu_bo *abo, *rbo;
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struct dm_plane_state *dm_plane_state_new, *dm_plane_state_old;
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uint32_t domain;
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int r;
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@@ -839,8 +838,7 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane,
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}
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afb = to_amdgpu_framebuffer(new_state->fb);
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- obj = new_state->fb->obj[0];
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- rbo = gem_to_amdgpu_bo(obj);
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+ rbo = gem_to_amdgpu_bo(new_state->fb->obj[0]);
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adev = amdgpu_ttm_adev(rbo->tbo.bdev);
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r = amdgpu_bo_reserve(rbo, true);
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@@ -855,15 +853,32 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane,
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goto error_unlock;
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}
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- if (plane->type != DRM_PLANE_TYPE_CURSOR)
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- domain = amdgpu_display_supported_domains(adev, rbo->flags);
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- else
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+ if (plane->type == DRM_PLANE_TYPE_CURSOR)
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domain = AMDGPU_GEM_DOMAIN_VRAM;
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+ else {
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+ domain = amdgpu_display_supported_domains(adev, rbo->flags);
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+
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+ if (!plane->state->fb || rbo->tbo.pin_count ||
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+ !(domain & AMDGPU_GEM_DOMAIN_GTT))
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+ goto skip;
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+
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+ abo = gem_to_amdgpu_bo(plane->state->fb->obj[0]);
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+
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+ if (amdgpu_bo_reserve(abo, true) ||
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+ dma_resv_reserve_fences(abo->tbo.base.resv, 1))
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+ goto err;
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+
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+ domain = amdgpu_mem_type_to_domain(abo->tbo.resource->mem_type);
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+err:
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+ amdgpu_bo_unreserve(abo);
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+ }
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+skip:
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r = amdgpu_bo_pin(rbo, domain);
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if (unlikely(r != 0)) {
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if (r != -ERESTARTSYS)
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- DRM_ERROR("Failed to pin framebuffer with error %d\n", r);
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+ drm_err(plane->dev,
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+ "failed to pin framebuffer with error %d\n", r);
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goto error_unlock;
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}
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--
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2.40.0
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